Junction Field-Effect Transistor

Unit VII: Junction Field-Effect Transistor (JFET)

Duration: 3 Hours | Credit: ELX 133.3

Introduction to Field-Effect Transistors

Field-Effect Transistors (FETs) are voltage-controlled devices where the output current is controlled by an applied electric field. Unlike BJTs which are current-controlled, FETs have very high input impedance, making them ideal for voltage amplification stages.

JFET Structure

Physical Configuration

A JFET consists of:

• Channel: A narrow conducting path (n-type or p-type)
• Gate: p-n junctions on both sides of the channel that control channel width
• Source (S): Terminal where charge carriers enter the channel
• Drain (D): Terminal where charge carriers exit the channel

Two Types of JFETs

• N-Channel JFET: Electrons are majority carriers in the channel
• P-Channel JFET: Holes are majority carriers in the channel

JFET Operating Principles

Gate-Source Voltage Control

The voltage between gate (G) and source (S) controls the width of the conducting channel:

• When V_GS = 0: Channel is at maximum width, maximum current flows
• As V_GS becomes more negative: Depletion region expands, channel narrows
• When V_GS = V_P (pinch-off voltage): Channel completely closes, no current flows

Pinch-Off Voltage (V_P)

The gate-source voltage that causes the channel to pinch off (V_GS = V_P)

• For n-channel JFETs: V_P is negative (typically -1 to -10 V)
• For p-channel JFETs: V_P is positive
• Typical values range from -0.5 V to -10 V

JFET Characteristics and Equations

Drain Current Equation (Shichman-Hodges Model)

In the saturation (pinch-off) region:

I_D = I_DSS × [1 - (V_GS / V_P)]²

Where:

• I_DSS: Drain-Source Saturation Current (when V_GS = 0)
• V_GS: Gate-Source voltage
• V_P: Pinch-off voltage

Key Characteristics

• Very high input impedance (typically 10⁶ - 10⁹ Ω)
• High output impedance in saturation region
• Low noise figure (excellent for low-noise amplifiers)
• Transconductance: g_m = 2 I_DSS / |V_P| × [1 - (V_GS / V_P)]

JFET Operating Regions

Ohmic Region (Linear Region)

• V_DS is small (V_DS < V_GS - V_P)
• Channel acts like a resistor (resistance controlled by V_GS)
• JFET used as voltage-controlled resistance (analog switch)
• Drain current increases approximately linearly with V_DS

Saturation Region (Pinch-Off Region)

• V_DS is large (V_DS > V_GS - V_P)
• Channel is pinched-off at the drain end
• Drain current becomes independent of V_DS
• JFET used for amplification
• Nearly constant current (ideal current source)

Cutoff Region

• V_GS < V_P (beyond pinch-off)
• Channel is completely closed
• Drain current ≈ 0 (only leakage current)

JFET as a Switch

Switching Operation

• V_GS = 0: JFET is ON (conducting), acts as low resistance
• V_GS = V_P: JFET is OFF (non-conducting), acts as open circuit
• Gate voltage controls the ON/OFF state without gate current draw
• Used in analog multiplexers, audio switches, and analog gates

Biasing and Q-Point

Biasing Objectives

1. Establish stable operating point (Q-point) independent of device parameters
2. Maximize output voltage swing for small signals
3. Maintain JFET in saturation region for amplification

Common Gate Bias Methods

• Fixed Gate Bias: Simple but unstable
• Self Bias: Most practical - uses source resistor to set gate voltage automatically
• Voltage Divider Bias: More complex but highly stable

DC Load Line

I_D = (V_DD - V_DS) / R_D

JFET Amplifier Configurations

Common Source Amplifier

• Input: Gate terminal
• Output: Drain terminal
• Common: Source terminal
• Voltage Gain: g_m × R_D (10-100)
• Input Impedance: Very high (10⁶ - 10⁹ Ω)
• Output Impedance: High (1-100 MΩ)

Common Drain Amplifier (Source Follower)

• Voltage Gain: Less than 1
• Input Impedance: Very high
• Output Impedance: Low (10-100 Ω)
• Application: Buffer, impedance matching

Common Gate Amplifier

• Input Impedance: Very low (a few hundred ohms)
• Voltage Gain: High (similar to common source)
• Application: High-frequency amplifier

JFET Parameters and Temperature Effects

Temperature Dependence

• I_DSS increases with temperature (0.3-0.5% per °C)
• V_P becomes less negative with temperature (about -2 mV/°C)
• g_m decreases with temperature

JFET Specifications

• I_DSS: Drain-Source Saturation Current
• V_P: Pinch-Off Voltage (Cutoff voltage)
• g_m0: Forward transconductance at V_GS = 0
• V_GS(off): Gate-Source cutoff voltage (same as V_P)
• B_VDSS: Drain-Source breakdown voltage
• I_GSS: Gate-Source leakage current

JFET vs BJT Comparison

Key Takeaways

• JFET is a voltage-controlled device with extremely high input impedance
• Gate-Source voltage controls the drain current through a quadratic relationship
• Pinch-off voltage defines maximum gate voltage for conduction
• JFET operates in saturation region for amplification
• Excellent for low-noise, high-impedance amplifier stages
• Used as voltage-controlled resistor in ohmic region
• Self-biasing is the most practical biasing method