Metal Oxide Semiconductor FET

Unit VIII: Metal Oxide Semiconductor Field-Effect Transistor (MOSFET)

Duration: 3 Hours | Credit: ELX 133.3

Introduction to MOSFETs

The MOSFET is the most widely used transistor in modern electronics. It dominates digital logic, power electronics, and analog integrated circuits. Its advantages include high input impedance, low power consumption, and excellent scaling properties.

MOSFET Structure

Physical Configuration

A MOSFET consists of:

• Source (S): Where charge carriers enter
• Drain (D): Where charge carriers exit
• Gate (G): Metal electrode separated from channel by thin oxide layer
• Substrate (B): Semiconductor base material (often connected to source)
• Oxide Layer: Thin SiO₂ (silicon dioxide) insulator

Two Types of MOSFETs

• n-Channel MOSFET (NMOS): Electrons conduct through channel
• p-Channel MOSFET (PMOS): Holes conduct through channel

MOSFET Operation Modes

Enhancement Mode MOSFET

Channel is created by applying gate voltage:

• V_GS = 0: No channel (OFF state)
• V_GS > V_T: Channel forms and conducts (ON state)
• V_T is the threshold voltage (typically 0.5-2.0 V for NMOS)
• Most common type in digital logic and power applications

Depletion Mode MOSFET

Channel exists at V_GS = 0:

• V_GS = 0: Maximum channel width (ON state)
• V_GS < V_T (negative): Channel depletes, current reduces
• Less commonly used, primarily in combination with enhancement MOSFETs

MOSFET Threshold Voltage

Threshold Voltage (V_T)

V_T = V_T0 + γ(√(Φ_s - V_SB) - √Φ_s)

Where:

• V_T0: Threshold voltage at V_SB = 0 (typically 0.3-0.8 V)
• γ: Body effect parameter
• Φ_s: Surface potential
• V_SB: Source-Bulk voltage

Body Effect

When source is not connected to substrate, V_T changes due to substrate bias

MOSFET Current-Voltage Characteristics

Drain Current Equation (Saturation Region)

I_D = (μ_n C_ox W / 2L) × (V_GS - V_T)²

Where:

• μ_n: Electron mobility in channel (typically 500-600 cm²/Vs for NMOS)
• C_ox: Gate oxide capacitance per unit area
• W: Channel width
• L: Channel length
• V_GS: Gate-Source voltage
• V_T: Threshold voltage

Transconductance

g_m = μ_n C_ox (W/L) (V_GS - V_T)

MOSFET Operating Regions

Cutoff Region

• V_GS < V_T
• No channel exists, I_D ≈ 0
• MOSFET is OFF

Linear (Ohmic) Region

• V_GS > V_T and V_DS < V_GS - V_T
• Channel acts like a resistor controlled by V_GS
• Current increases linearly with V_DS
• Used as analog switch or voltage-controlled resistor
• I_D = (μ_n C_ox W / 2L) × [2(V_GS - V_T)V_DS - V_DS²]

Saturation Region

• V_GS > V_T and V_DS > V_GS - V_T
• Channel pinches off at drain end
• Current nearly independent of V_DS
• Used for amplification
• Acts as nearly ideal current source

CMOS Technology

Complementary MOS (CMOS)

CMOS combines NMOS and PMOS transistors:

• NMOS: Connects high level (V_DD) to output (pull-up)
• PMOS: Connects ground to output (pull-down)
• When one is ON, the other is OFF (never both ON simultaneously)
• Extremely low static power consumption
• Standard technology for all modern microprocessors and logic circuits

CMOS Inverter

The basic CMOS logic gate:

• NMOS and PMOS in series between V_DD and ground
• Input at common gate nodes
• Output at common drain node
• Input LOW: NMOS OFF, PMOS ON, Output HIGH (≈ V_DD)
• Input HIGH: NMOS ON, PMOS OFF, Output LOW (≈ 0V)

CMOS Advantages

• Very low power consumption (only during switching)
• Wide noise margins
• High input impedance
• Fast switching speed
• Good scalability for increasing integration

MOSFET as a Switch

Switching Characteristics

• ON Resistance: R_ON = 1 / [μ_n C_ox (W/L)(V_GS - V_T)]
• ON current: I_ON = V_DD / R_ON
• OFF leakage: I_OFF ≈ 10^-9 - 10^-12 A

Applications as Switch

• Logic gates (AND, OR, NAND, NOR)
• Multiplexers and demultiplexers
• Analog switches
• Power switches in power supplies

MOSFET Capacitances

Gate Capacitance

The oxide layer acts as a capacitor:

• C_ox = ε₀ ε_r / t_ox (per unit area)
• Depends on oxide thickness (t_ox) and permittivity
• Thinner oxide → higher capacitance → faster devices

Junction Capacitances

• Source-Bulk capacitance (C_SB)
• Drain-Bulk capacitance (C_DB)
• Affects switching speed and power consumption

MOSFET Biasing

Biasing Considerations

• Gate needs voltage > V_T for NMOS to conduct
• Very simple biasing (just apply voltage to gate)
• No gate current (purely capacitive loading)
• Ideal for both analog and digital applications

Scaling and Modern MOSFETs

Technology Scaling

• Feature size reduction follows Moore's Law
• Current technology: 3-7 nm process nodes
• Benefits: Higher speed, lower power, better integration
• Challenges: Short-channel effects, leakage current, variability

Short-Channel Effects

• Threshold voltage roll-off
• Drain-induced barrier lowering (DIBL)
• Punch-through
• Increased leakage current

Key Takeaways

• MOSFETs are voltage-controlled devices with zero gate current
• Threshold voltage controls ON/OFF state
• Saturation region provides amplification; linear region acts as switch
• CMOS technology dominates modern digital electronics
• Extremely low static power consumption in CMOS circuits
• High input impedance (only capacitive loading)
• Perfect scaling for increasing integration density