Pipelining and Parallelism
Pipelining is a technique where multiple instructions are overlapped during execution, similar to an assembly line. It increases instruction throughput without reducing individual instruction execution time.
Instruction Pipelining
A basic 5-stage pipeline divides instruction execution into: Instruction Fetch (IF), Instruction Decode (ID), Execute (EX), Memory Access (MEM), and Write Back (WB). While one instruction is in EX, the next is in ID, and another is in IF. Ideally, one instruction completes per clock cycle.
Pipeline Hazards
Structural hazards occur when hardware resources are insufficient. Data hazards arise when an instruction depends on the result of a previous one still in the pipeline (RAW, WAR, WAW). Control hazards occur with branches that change the instruction flow.
Hazard Solutions
Data hazards are resolved by forwarding, stalling, or reordering instructions. Control hazards use branch prediction, delayed branching, or speculative execution. Modern processors use complex prediction algorithms with high accuracy.
Superscalar Architecture
A superscalar processor has multiple execution units and can issue multiple instructions per clock cycle. The Tomasulo algorithm dynamically schedules instructions using reservation stations.
Multicore Processors
Multicore processors integrate multiple processing cores on a single chip. Each core has its own pipeline and often private L1/L2 cache, with shared L3 cache. Multithreading (SMT/Hyper-threading) allows a core to execute multiple threads.
Parallel Architectures
Flynn's taxonomy classifies architectures: SISD, SIMD (GPUs, vector processors), MISD (rare), and MIMD (multiprocessors, clusters). SIMD is effective for data-parallel tasks.
Performance Metrics
Speedup = sequential time / parallel time. Amdahl's Law: speedup is limited by the sequential fraction. Gustafson's Law argues that problem size scales with processors, giving better practical speedup.
Summary
Pipelining and parallelism are key techniques for improving processor performance. Understanding pipeline hazards, superscalar design, multicore architecture, and parallel computing models is essential for modern computer architecture.