Chapter 6: Registers and Counters
Introduction
Registers and counters are fundamental sequential circuits built from flip-flops. Registers store data temporarily, while counters count events or create timing sequences. Both are ubiquitous in digital systems: computers use registers for fast memory storage, and counters are essential for generating time delays, dividing frequencies, and sequencing operations.
1. Registers
Basic Register
A register is a group of flip-flops that store a word of data. A 4-bit register consists of four D flip-flops sharing a common clock. Data is loaded and retrieved parallel (all bits at once). Load control signals determine whether the register accepts new data or maintains its current value.
Register Transfer Operations
Common register operations include load (capture new data), hold (maintain current value), and clear (set to zero). These are controlled by select signals or control inputs. In more complex systems, buses allow data to move between registers.
2. Shift Registers
Serial In, Parallel Out (SIPO)
Data enters serially (one bit at a time) and is shifted through the register. After four clock pulses (for a 4-bit register), the output appears in parallel. This is useful for serial-to-parallel conversion, common in communication systems.
Parallel In, Serial Out (PISO)
Data enters in parallel (all bits simultaneously) and is shifted out serially. This implements parallel-to-serial conversion, essential for transmitting parallel data over serial channels (like USB or serial ports).
Parallel In, Parallel Out (PIPO)
Data enters and leaves in parallel. These are simple registers with load capability, the most straightforward register type.
Universal Shift Register
A versatile component that can perform shift left, shift right, parallel load, and hold operations. The 74194 is a classic universal shift register IC, widely used in digital design for flexible data manipulation.
3. Counters
Binary Ripple Counter (Asynchronous)
The simplest counter uses T flip-flops connected in cascade. The output of one stage feeds the clock input of the next. Each stage divides the frequency by 2. For a 4-bit ripple counter, the first stage has period 2, second has 4, third has 8, fourth has 16. The carry ripples through all stages before stabilizing. This causes variable propagation delay, limiting maximum frequency.
Binary Synchronous Counter
All flip-flops share the same clock signal, triggering simultaneously. More complex logic determines which flip-flops toggle based on the current count. This eliminates the cascading delay of ripple counters and increases maximum frequency. Synchronous counters are more practical for high-speed applications despite greater complexity.
Decade Counter (BCD Counter)
Counts from 0 to 9 (0000 to 1001 in BCD), then resets to 0. Often implemented by modifying a binary counter with logic to detect count 10 and trigger a reset. Essential for display drivers and decimal counting applications.
Counter Control Functions
Enable/Disable: when disabled, the counter maintains its count. Up/Down: allows counting up or down. Clear: synchronously or asynchronously resets to zero. Preset: loads a specific value. Most practical counters include these features as control inputs.
4. Timing Sequences and State Machines
Generating Timing Signals
Counters naturally generate timing sequences. A 4-bit counter cycles through 16 states. Taking outputs at intermediate stages or decoding specific counts creates timing pulses for controlling other circuits. This is how digital systems sequence operations—counters step through predefined patterns.
Counter as a State Machine
A counter is really a special-case state machine that cycles through numbered states. More general state machines can take non-sequential paths, implementing complex control logic. Counters are the simplest state machines; arbitrary state machines require additional logic.
5. Counter and Register ICs
Common Shift Register ICs
The 74165 (PISO) and 74166 (similar) are parallel-in serial-out registers. The 74164 is a serial-in parallel-out register. The 74194 and 74195 are universal shift registers. These are standard building blocks in digital design.
Common Counter ICs
The 7490 is a decade counter. The 7493 is a 4-bit binary counter. The 74160/74161 are synchronous decade/binary counters. Modern systems use larger counter blocks within microcontrollers and FPGAs, but the underlying principles remain the same.
6. Practical Considerations
Synchronization
Asynchronous counters have variable propagation delay—the most significant bit changes last. This can cause transient glitches where the output briefly shows incorrect values during transitions. Synchronous counters eliminate this issue by having all bits change simultaneously.
Frequency Dividers
Counters naturally divide frequency. A 4-bit counter divided by 16, so if the input clock is 16 MHz, the most significant bit oscillates at 1 MHz. This is how digital systems generate lower clock frequencies for different parts of the design.
Modulo-n Counters
To count modulo n (reset after n counts), use n = 2^k directly with binary counting, or add decode logic to detect n and trigger reset. This is essential for creating counters with non-power-of-2 counts (like decade counters counting 0-9).
Conclusion
Registers store data, shift registers move data sequentially, and counters generate sequences and timing signals. These components are building blocks for all digital systems. Understanding their design, control functions, and timing characteristics is essential for creating reliable, efficient digital circuits. Whether implemented as discrete ICs or within larger systems (microcontrollers, FPGAs), these principles remain fundamental.